1. Field of the Invention
The present invention relates to a circuit configuration of a band gap circuit, in particular, a band gap circuit capable of outputting an output voltage without changing a K-value even in a case of using a transistor which is large in size and has poor response characteristics with a small K-value.
2. Description of the Related Art
FIG. 2 is a circuit diagram of a conventional band gap reference voltage circuit. The voltage circuit is constituted of PMOS transistors P21, P22, P23, P24, and P25, NMOS transistors NL21, NL22, and NL23, an n-channel type depression transistor ND21, bipolar transistors B21 and B22, and resistors R21, R22, and R23. In FIG. 2, when a ratio of an area of an emitter of a first bipolar transistor B21 to that of a second bipolar transistor B22 is set to 1:N, an output voltage VREF expressed by the equationVREF=VBE+Vt×1n N(1+R21/R22)can be obtained under normal conditions. In the equation, VBE is a voltage applied across the base and the emitter of a bipolar transistor, and Vt is obtained by the equation of Vt=kT/q, where k is a Boltzmann constant, T is an absolute temperature, and q is an electron charge.
(Patent Document 1) JP 2004-86750 A
The conventional example of FIG. 2 is configured so as to be capable of outputting a predetermined output voltage VREF from an output terminal under stable conditions when a power supply voltage is applied across a power supply terminal VDD of a high potential and a power supply terminal VSS of a low potential. However, there is a drawback in the conventional example in that, in the case where sizes of the transistors P24 and P25 have been increased (to, for example, 100 μm for width “W” and 50 μm for length “L”) for offset elimination, if the transistor is the one manufactured by a process which leads to poor response characteristics in which a K-value is further decreased, the output voltage is stabilized at 0 V immediately after the power supply fluctuation.